MAXDATA QutePC?1000 Guía de usuario Pagina 33

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32 Board Set Description
33MAXDATA PLATINUM 90002R Server System
Processor Sockets
Each Intel
®
Itanium
®
2 processor plugs into a 700-pin Zero Insertion Force (ZIF) socket. Each processor
is powered by a 12 V power pod located adjacent to the processor on the main board. Attached to
the top of each processor is a heat sink that dissipates thermal energy.
Memory Subsystem
The basic architecture of the memory subsystem is as follows:
The DIMMs reside on the main board, between the PCI riser assembly and the chassis.
Rour Rambus channels run from the Scalable Node Controller (SNC) to each of the four
Memory Repeater Hubs (MRH-D).
There is one MRH-D device per Rambus channel.
A single DDR branch channel is implemented off each MRH-D.
Each DDR branch channel supports two 184 pin DDR DIMMs.
The server system includes eight DIMM connectors in two rows.
Each row of DIMM sockets supports four DDR DIMMs, one channel of each MRH-D, which
collectively make-up a cache line.
The DIMM socket locations are shown in the gure below.









Figure 18. Location of Memory DIMMS
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